The present invention relates to a method for manufacturing a metal-oxide semiconductor device, which will be called a MOS device hereinafter, and, in particular, to a method for manufacturing the device where low resistant silicide layers of refractory metal overlie domains of diffusion layers and gate electrodes of polycrystalline silicon layers, which will be called polysilicon layers hereinafter.
A typical MOS device is a complementary MO device which is provided with a P-type MOS transistor and a N-type MOS transistor in one silicon substrate. The complementary MOS device will be called a CMOS device, hereinafter.
Recent high integration rate of the CMOS device makes a depth of junction between the source and the drain be shallow to thereby increase resistivity of impurity diffusion layers in the device. This makes is difficult to produce high-speed operation semiconductor devices. In order to resolve the problem, the, so-called, "SALISIDE TECHNIQUE" has been used to form silicide films of refractory metal, such as Ti, Ni, Pt, Co, Mo, W, and Ta in self-alignment on the diffusion layers and on the gate electrode of polysilicon.
In detail, after forming polysilicon gate electrode layers and the impurity diffusion layers on a silicon substrate in production of CMOS devices, a layer of the refractory metal, for example, a titanium film is formed on the entire surface of the substrate to overlie the polysilicon layers and the impurity diffusion layers. Then, a first heat treatment is performed to convert the titanium film into a titanium silicide film by reaction of silicon and titanium. The titanium silicide is a type of C49 phase. Then, the titanium silicide film is partially removed by etching to retain titanium silicide layers on the impurity diffusion layers and the polysilicon gate electrodes. Thereafter, a second heat treatment is performed to convert the C49 phase titanium silicide layers into titanium silicide layers of a C54 phase which exhibits lower resistance than C49 phase. Thus, the diffusion layers and gate electrodes are made with low resistances and therefore, CMOS devices can be produced with excellent properties. The crystal structure of the C49 phase is base-centered orthorhombic, but the crystal structure of C54 phase is face-centered orthorhombic. The second heat treatment is performed at a temperature higher than the first heat treatment.
The conventional method has a problem that the temperature in the second heat-treatment, that is, a phase transition temperature rises in accordance with a decrease in thickness of the titanium silicide (TiSi.sub.2) layers. This is described in a report by J. Appl. Phys. 71 (9), 1 May 1992, p.p. 4269-4276.
JP-A-1 179415 proposes a modified method of the SALISIDE TECHNIQUE for forming the low resistance silicide layers on the diffusion layers and gate electrodes. In the modified method, after forming the titanium film on the substrate, silicon ions are implanted into diffusion layers through the titanium film by the implantation-through-metal-method to convert the diffusion layers into the amorphous phase. Then, the titanium film of C49 phase is converted into titanium silicide film by lamp annealing. Then, the titanium silicide is partially removed by etching technic to remain titanium silicide layers on the diffusion layers and gate electrodes. Thereafter, the titanium silicide layers are converted from C49 phase into C54 phase by a heat treatment. The modified method is silent as regards suppression of rise of the phase transition temperature.